Memory Logic Design and Validation Engineer
Location: Cedar Park
Posted on: January 19, 2023
You will be part of Intel Advanced Design Organization (AD) within
Design Enablement (DE) focused on pathfinding and development of
advanced memory technology and circuits to enable best-in-class
memory collateral/IP and product design across all generations of
Intel process technology.
Oversees definition, design, verification, and documentation for
SoC (System on a Chip) development. Determines architecture design,
logic design, and system simulation. Defines module
interfaces/formats for simulation. Performs Logic design for
integration of cell libraries, functional units and subsystems into
SoC full chip designs, Register Transfer Level coding, and
simulation for SoCs. Contributes to the development of
multidimensional designs involving the layout of complex integrated
circuits. Performs all aspects of the SoC design flow from
highlevel design to synthesis, place and route, timing and power to
create a design database that is ready for manufacturing. Analyzes
equipment to establish operation infrastructure, conducts
experimental tests, and evaluates results. May also review vendor
capability to support development.
You must possess the below requirements to be initially considered
for this position. Preferred qualifications are in addition to the
requirements and are considered a plus factor in identifying top
Experience listed below would be obtained through a combination of
your schoolwork and/or classes and/or research and/or relevant
previous job and/or internship experiences.
MS or PhD Degree in Electrical Engineering or related field with 4+
years of professional experience in Logic design, pre and post-Si
validation and testing,
Including but not limited to the following:
- Micro-architecture definition of design features, test plan
creation and functional verification.
- Effective behavioral modeling and testing of Analog and
Mixed-signal circuits in Verilog and System Verilog, as well as
logical equivalence verification between schematic and Verilog
- UPF (Unified Power Format) creation using low power techniques
and handling multiple power domain design.
- Physical verification of behavioral models and circuits through
industry standard tools (spyglass, vclp) and methods.
- JTAG and other industry-standard protocols, state machines,
memory logic design and verification.
- Experience in Pre-Si validation - creation of test plan, test
bench and test case development, review and debug of test results,
and coding assertions to prevent illegal states.
- Experience in test bench creation to generate Post-Si test
patterns and vectors.
- Experience in product development and testing using
- Experience in Magnetoresistive Random Access Memory
- Experience in Pre and Post-Si characterization and debug,
including proposing and writing tests and experiments, and
- Knowledge of behavioral modeling, Verilog and System Verilog
coding, and OVM.
- Experience in scripting languages (perl, tcl etc) to enhance
automation in design, validation and testing Inside this Business
As the world's largest chip manufacturer, Intel strives to make
every facet of semiconductor manufacturing state-of-the-art from
semiconductor process development and manufacturing, through yield
improvement to packaging, final test and optimization, and world
class Supply Chain and facilities support. Employees in the
Technology Development and Manufacturing Group are part of a
worldwide network of design, development, manufacturing, and
assembly/test facilities, all focused on utilizing the power of
Moore's Law to bring smart, connected devices to every person on
Intel strongly encourages employees to be vaccinated against
COVID-19. Intel aligns to federal, state, and local laws and as a
contractor to the U.S. Government is subject to government mandates
that may be issued. Intel policies for COVID-19 including guidance
about testing and vaccination are subject to change over time.
All qualified applicants will receive consideration for employment
without regard to race, color, religion, religious creed, sex,
national origin, ancestry, age, physical or mental disability,
medical condition, genetic information, military and veteran
status, marital status, pregnancy, gender, gender expression,
gender identity, sexual orientation, or any other characteristic
protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in
the industry. It consists of competitive pay, stock, bonuses, as
well as, benefit programs which include health, retirement, and
vacation. Find more information about all of our Amazing Benefits
This role will be eligible for our hybrid work model which allows
employees to split their time between working on-site at their
assigned Intel site and off-site. In certain circumstances the work
model may change to accommodate business needs.
Keywords: INTEL, Cedar Park , Memory Logic Design and Validation Engineer, Other , Cedar Park, Texas
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